In recent years, the performance of components constituting a computer and other information processing apparatuses has been improved significantly. This seems to be due particularly to the improvement in the component performance of SRAM (Static Random Access Memory), DRAM (Dynamic Random Access Memory), processors, switch LSI (Large Scale Integration), and so on. However, in order to improve system performance, the signal transmission speed between these components and elements needs to be improved. In this regard, the improvement of system performance includes an increase in the transmission capacity that is measured by bit/sec, a decrease in the transmission delay, and so on.
For example, the gap between the speed of memories such as SRAM, DRAM and that of a processor is expanding, and the gap between the speeds is hindering the improvement of computer performance. In addition, as IC chips become larger, not only the signal transmission between these chips but also the signal transmission speed between elements and between circuit blocks on an IC chip is becoming a significant factor that limits the performance of the IC chip. Furthermore, the signal transmission speed needs to be improved also for the coupling between servers or between boards.
However, with an improvement in the signal transmission speed, in a case where a signal is received at a high data rate on a printed circuit board on which a plurality of IC chips are mounted, the signal quality deteriorates to a large extent, due to signal reflection and crosstalk. In addition, in a case where a plurality of IC chips are mounted on a circuit board and signal lines coupling between the IC chips cross in a complicated way, and with some signals, where a plurality of IC chips are coupled to one signal line, the signal quality deteriorates to a large extent.
The wiring diagram in FIG. 18 includes IC chips 181-184 (IC1-IC4). It is a configuration example of so called multidrop coupling where IC chips are coupled by signal lines.
Such a wiring of signal lines causes the deterioration of signal quality (distortion of waveform), due to mutual interference between a plurality of signals and multiple reflection of a signal caused by impedance mismatching at a multidrop coupling point.
Therefore, proposals have been made for avoiding the degradation of the signal quality due to the wiring topology having complicated crossing and multidrop coupling. In Japanese Laid-open Patent Publication No. 4-282913, a proposal is made to make it possible to perform signal transmission with little delay, by providing a switch for bypassing an LSI and using the bypass path when there is no need to go through the LSI.
In addition, the switching of signals in a general IC chip is performed with the router function that is built in the signal processing part of the IC chip itself. The router function is realized by a logic circuit. In recent years, with the speeding up of the I/O, the operating frequency of the logic circuit is often a low value being a fraction (for example, ¼, ⅛, 1/16) of the clock frequency of a signal. Therefore, the router function by means of a logic circuit generates a large signal delay. For this reason, there has been a problem that when all signals are routed through the router function and the logic circuit within a chip, the overall performance of a system deteriorates due to the signal delay.